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Release of HWAccess v1.10
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Description
The CPU library reports information about the installed processor(s) provides access to the Model Specific Registers and performs processor tests. This library follows the IA32 architecture and has been tested with Intel and AMD processor parts. All information shown follows the documentation provided by Intel and AMD.
The MSR list under the CPU active controls allows access to the MSRs of the processor. The user may Read or Write to the MSRs. The library will only display and control MSRs related with the installed processor. Incorrect access to the MSRs may damage and/or reset the PC system and may cause file corruption. To limit these problems when the library starts none of the MSRs is selected for browsing.
During startup the library attempts to calculate the current processor speed. Such measurement is subject to system latency. For best results invoke the refresh function once library initialization is complete. The refresh function is available from the CPU Active controls. By doing a right click in the parameters window under the CPU entry there are options to scan the MSRs. The same options are available from the active controls.
Topology in the Parameters Pane
There is a maximum of 2 entries for the CPU library under the parameters window. The first involves details about the core of the processor. The second is shown when the user invokes the Read MSR function. The processor core entry is always present. With v1.0.0.10 of the library you must select the core entry after a refresh function is invoked to see the updated information.
Functionality of the Active Controls
The CPU library has several controls to manipulate the MSR registers and perform processor tests.
There is one display control for the sampling period setting. Depending on the number of logical processors active in the system there are additional displays for the number of instructions/sec each logical processor executes.
Using the up/down controls of the sampling period display forces the monitor functionality to poll the active MSR watches and check for register changes subject to the predefined period. Valid values are in the range of 1-9999 mS. The integrated controls are used to add/remove/disable a watch, apply a different sampling watch period, initiate or abort a CPU test, read & write MSRs. In addition a test and priority list are present to configure the processor test. The following table describes the functionality and usage of each active control for the CPU library.
| Active Control | Usage |
| Remove Watch | Select the MSR you want to remove from the processor register list and hit the Remove Watch button. If an active watch is present it will be removed. |
| Add Watch | Select the MSR you want to add from the processor register list and hit the Add Button. A watch will be inserted and shown in the main watch window in HWAccess. The CPU watches inserted are 64-bit wide. The sampling period defines how often this register will be interrogated by the library. If its value changes it will be displayed in the watch window of HWAccess. |
| Delete MSR watches | Removes all MSR watches. |
| Disable MSR watches | Disables all MSR watches. |
| Enable MSR watches | Enables all MSR watches. You can disable the MSR watches, modify the sampling period and re-enable them. The monitor process checks the period set on every sample and period changes take effect when the Apply Watch Period button is pressed. |
| Apply Watch Period | Applies the watch period selected within the sampling period display. Changes take effect immediately for active watches. |
| Rescan Processor | Rescans the processor including the frequency. |
| Perform CPU test | Initiates a CPU test based on the Processor test selected and priority test setting. The priority setting indicates how much time the dedicated thread will use on the logical processor. Higher setting monopolizes CPU usage but makes the system slower to respond to other request. The following tests are available - Generic Register to Register uses the general purpose 32-bit registers only performing logical, general and arithmetic instructions. - Generic Register to Memory uses the general purpose 32-bit registers and individual memory locations. - FPU Register to Register uses floating point registers only. - MMX Register test uses the SSE instruction set if supported. - XMM Register test uses the SSE2 instruction set if supported. Results are immediately displayed in the Instruction counters. Concurrent activity of other applications or HWAccess does affect the instructions executed and therefore you can determine how firm the system performance can be. |
| Abort CPU test | Aborts the CPU test that is running. |
| Read MSR Registers | Reads the MSR registers that are set in the processor register list. (Not the ones that are selected). Use this option with care and follow the manufacturer guidelines. Incorrect access to the MSR registers could reset/damage the system. Values automatically update the processor list cells. |
| Write MSR Registers | Writes the MSR registers that are set in the processor register list. (Not the ones that are selected). Use this option with care and follow the manufacturer guidelines. Incorrect access to the MSR registers could reset/damage the system. Values from the data cells update the MSR registers. |
MSR Table
The table consists of the known MSRs for the installed processor. There are different columns displaying the MSR name documented by the processor manufacturer, the Data to read/write to each MSR and the access mode for each MSR. The MSR field is a non-editable field that lists the MSR index and MSR name. A check box left from this field indicates to the library if the register will be accessed. When set, the register will be accessed the next time a Scan/Update MSR operation is invoked on the Parameters window or through the active controls. The type of access is defined by the Type field and can be R/W, Read-Only or Write-Only. Refer to the processor documentation before setting up MSRs.
To change the value of an MSR Mouse left-click the Data column of the register you want to change. Set the register to checked state and select Update IA32 MSRs from the Parameters window by doing a Mouse right-click on the CPU Configuration entry. Be aware the library will update all checked registers that are in R/W, or Write Only mode with this command.
Please note the checking an MSR does not monitor the register. To watch an MSR select the MSR entry by clicking the name of the register and then click the Add Watch function under the CPU active controls.
Depending on the MSR the library may report additional information for each register field in the HWAccess main view. Additional information can be displayed for the MSR sub-fields. For instance for the MTRR registers the mapping of each range is also shown.
Processor Information
The processor information displayed in the main View window is derived by the CPUID instruction. Processor basic/extended features shown in the main view of HWAccess are as documented by the processor manufacturer.
The calculated speed is performed by the library itself. This field is updated every time a refresh operation is performed and shows the processor speed as it was calculated by the CPU configuration library.
Static Configuration
The CPU configuration has 2 options. The Show Details option shows/hides verbose register information. When this option is cleared only the MSRs register contents are displayed in hex format. For some processor types the Show Known Registers option when cleared allows editing of non documented MSRs.
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